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GATE CSE Local Optimisation PYQs

Standard yield5.9% of Compiler Design

In GATE Compiler Design, the Code Optimization topic focuses on evaluating code transformations such as Common Sub-expression Elimination (CSE), Loop-Invariant… Read the guide

Questions
4
Asked
since 2013
Total marks
8
Marks / paper
0.3

4 GATE CSE Local Optimisation PYQs with solutions, from Compiler Design. Browse all GATE CSE PYQs.

Questions

Every official paper that asked this topic, newest first.

What GATE tests in Local Optimisation

Concepts, patterns, formulas and traps distilled from past papers.

In GATE Compiler Design, the Code Optimization topic focuses on evaluating code transformations such as Common Sub-expression Elimination (CSE), Loop-Invariant Code Motion (LICM), and statement reordering under hardware constraints. Questions test the candidate's ability to analyze variable liveness, register pressure, and the dynamic operation count of optimized code segments.

Core concepts

  • Common Sub-expression Elimination (CSE)
  • Loop-Invariant Code Motion (LICM)
  • Liveness Analysis and Dead Variable Elimination
  • Register Pressure and Register Allocation Spilling
  • Heap Pointer Dereference Optimization
  • Branch-aware Statement Sinking/Reordering
  • Identification of leaders in three-address code sequences
  • Basic block partitioning and boundaries
  • Directed Acyclic Graph (DAG) construction for basic blocks
  • Local common subexpression elimination
  • Algebraic identities and simplification within basic blocks

Recurring question patterns

  • Dynamic Operation Counting Post-Optimization (CSE and LICM)

    OccasionalMCQ2 marks2021

    A C code snippet with a loop containing repeated expressions and field dereferences is provided. The candidate must determine the exact count of runtime operations (e.g., additions, dereferences) executed after applying optimizations like Common Sub-expression Elimination and hoisting invariant expressions out of the loop.

  • Register Allocation and Spilling with Code Motion

    OccasionalMCQ2 marks2013

    Given an instruction set architecture with a severely constrained number of registers (e.g., 2 registers), candidates must reorder instructions using code motion and liveness information to determine the minimum number of spills to memory required during execution.

  • Partitioning Three-Address Code into Basic Blocks

    CommonNAT2 marks2025

    Given a labeled sequence of three-address code instructions containing conditional/unconditional jumps, determine the number of basic blocks by identifying all leader instructions.

  • DAG Representation and Counting for a Basic Block

    CommonMCQ2 marks2014

    Given a single basic block with variable reassignments and common subexpression/algebraic identities, construct the minimal DAG representation and count the total number of nodes and edges.

Formulas GATE uses

Loop Iteration Count

Niter=limit−startstepN_{\text{iter}} = \frac{\text{limit} - \text{start}}{\text{step}}

Used to compute how many times a counted for loop body executes when calculating dynamic runtime operations.

Total Dynamic Operations

Opstotal=Opspre-loop+(Niter×Opsper-iteration)\text{Ops}_{\text{total}} = \text{Ops}_{\text{pre-loop}} + (N_{\text{iter}} \times \text{Ops}_{\text{per-iteration}})

Used to sum operations executed once outside the loop (after LICM/CSE) with the operations executed per iteration (including the loop increment).

Leader Identification Rules

L={1}∪{t∣jump to t}∪{j+1∣instruction j is a jump}L = \{1\} \cup \{t \mid \text{jump to } t\} \cup \{j + 1 \mid \text{instruction } j \text{ is a jump}\}

Used to find all leader instructions which define the start of each basic block in intermediate code.

DAG Total Node Count

∣V∣=∣Leaves (distinct initial operands)∣+∣Interior nodes (unique operations)∣|V| = |\text{Leaves (distinct initial operands)}| + |\text{Interior nodes (unique operations)}|

Used when computing the minimum number of nodes in a DAG after local common subexpression elimination.

Examiner traps in Local Optimisation

  • Forgetting to include the loop increment operation (e.g., `i = i + 2`) in the total addition count.
  • Assuming repeated sub-expressions inside conditional branches execute every time without recognizing they can be pre-computed before the loop if invariant.
  • Counting operations statically from source text rather than dynamically over all loop iterations.
  • Failing to sink dead or branch-exclusive computations into the respective branch body (e.g., `else` block), resulting in an overestimation of required register spills.
  • Forgetting the instruction immediately following a conditional or unconditional branch as a leader
  • Failing to recognize algebraic simplifications or reordered commutative operands (e + b vs b + e) that map directly to existing DAG nodes
  • Over-counting nodes by allocating a new leaf node on variable reassignment rather than attaching new labels to existing nodes
  • Treating single-instruction lines between leaders as not being distinct basic blocks

How questions are asked

  • Dynamic arithmetic and memory access counting post-CSE/LICM
  • Minimum register spills evaluation under restricted architecture
  • Count the total number of basic blocks in a given three-address code sequence
  • Determine the minimum number of nodes and edges in the DAG of a basic block

Paper trends

  • Questions consistently carry 2 marks and assess concrete runtime implications (exact operation counts or exact spill counts) rather than abstract theoretical definitions.

    2021, 2013

  • Shift from low-level register allocation/spill minimization in basic blocks with branches towards higher-level loop-invariant code motion and pointer dereference elimination.

    2021, 2013

  • While earlier exams tested structural DAG properties (nodes/edges count) via standard 4-option MCQs, recent exams test basic block identification using exact integer NAT prompts.

    2025, 2014

Difficulty notes

Medium difficulty throughout: questions require multi-step tracking of variable lifetimes, loop bounds, and branching logic rather than single-formula applications. Hardness increases when pointers/dereferences or tight register limits force careful step-by-step register allocation simulation.