What are common examiner traps in Principles of Layering?

Confusing hop-by-hop addressing with end-to-end addressing: thinking the destination MAC is the end host MAC or a Layer-2 switch MAC rather than the next-hop router's interface MAC. Layer function assignment errors: placing bit synchronization in Data Link layer instead of Physical layer. Encryption boundary confusion: assuming network/transport headers (IP/Port) are encrypted when upper-layer (session/application) encryption is used. Counting router layer visits incorrectly: forgetting that intermediate routers decapsulate incoming frames (L2 visit up) and encapsulate into new outgoing frames (L2 visit down), visiting L2 twice per router. Overlooking pipelining in multi-packet delay: multiplying entire file transmission time by the number of hops instead of computing first packet traversal plus remaining packet pipeline times.

GATE CSE Principles of Layering PYQs

Standard yield7.1% of Computer Networks

Principles of Layering in GATE CS evaluates fundamental understanding of the OSI/ISO and TCP/IP reference models, focusing on layer responsibilities, protocol d… Read the guide

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Questions: 12
Asked: since 2011
Total marks: 14
Marks / paper: 0.5

12 GATE CSE Principles of Layering PYQs with solutions, from Computer Networks. Browse all GATE CSE PYQs.

Questions

Every official paper that asked this topic, newest first.

What GATE tests in Principles of Layering

Concepts, patterns, formulas and traps distilled from past papers.

Principles of Layering in GATE CS evaluates fundamental understanding of the OSI/ISO and TCP/IP reference models, focusing on layer responsibilities, protocol data units (PDUs), and layer traversal mechanics. Questions frequently test header encapsulation, header visibility across intermediate devices (switches, routers, firewalls), and hop-by-hop versus end-to-end addressing. The topic consists predominantly of 1-mark conceptual MCQs/MSQs with occasional 2-mark multi-hop packet transmission delay calculations.

Core concepts

OSI 7-Layer vs TCP/IP 4/5-Layer Architecture and Services
Layer Responsibilities (Bit sync at Physical, Framing/Error control at Data Link, Routing at Network, Process-to-process at Transport)
Protocol Data Units (Bits, Frames, Packets/Datagrams, Segments, Messages)
Header Encapsulation and Decapsulation along the network path
End-to-end (IP, Port) vs Hop-by-hop (MAC) Addressing
Layer-specific Network Devices (L2 transparent switches, L3 routers, L4/L7 firewalls)
Pipelined Store-and-Forward Packet Switching Delay
Header Field Bit-lengths (MAC: 48 bits, IPv4/IPv6 fields, TCP/UDP ports: 16 bits, TCP Seq Num: 32 bits)

Recurring question patterns

OSI / TCP-IP Layer Functionality and Mapping
CommonMCQ1 marks2025, 2014, 2012
Questions require matching protocol layers with their primary services (e.g., bit synchronization at physical layer, packet routing at network layer, process communication at transport layer) or identifying protocol assignments and PDUs (Message, Segment, Datagram, Frame).
Encapsulation, Header Visibility, and Intermediary Device Processing
Commonmixed1.5 marks2024, 2014, 2013, 2011
Scenarios where a packet traverses intermediate nodes (switches, routers, firewalls, sniffers) to determine which header fields (IP, MAC, Port, Payload) are inspected, modified, or visible given a specific layer of encryption or filtering capability.
Multi-hop Store-and-Forward Network Delay
OccasionalMCQ2 marks2012
Calculating total transmission and propagation delays for a multi-packet message traversing intermediate store-and-forward routers over point-to-point links using pipelined packet switching.
Protocol Field Sizes and Cryptographic Primitive Classification
OccasionalMCQ1 marks2018, 2016, 2014
Questions testing exact header field sizes across different layer protocols (e.g., UDP port, MAC address, IPv6 Next Header, TCP sequence number) or classifying cryptographic algorithms across protocol layers (hash functions vs asymmetric/symmetric ciphers).

Formulas GATE uses

Store-and-Forward Pipelined Packet Switching Total Time

T_{\text{total}} = k \cdot (T_t + T_p) + (N - 1) \cdot T_t

Used when $N$ identical packets traverse $k$ identical links with transmission delay $T_t = L/B$ and propagation delay $T_p = d/v$ under store-and-forward routing.

Transmission Delay

T_t = \frac{L}{B}

Calculating the time needed to push all packet bits of length $L$ onto a link of bandwidth $B$ .

Propagation Delay

T_p = \frac{d}{v}

Calculating the time taken for a bit to travel distance $d$ across a medium with propagation velocity $v$ .

Layer Visits Count in Multi-hop Path

\text{Visits}_{\text{Network}} = k + 2, \quad \text{Visits}_{\text{Data Link}} = 2k + 2

Determining how many times a packet traverses network and data link layers between source, $k$ intermediate routers, and destination.

Examiner traps in Principles of Layering

Confusing hop-by-hop addressing with end-to-end addressing: thinking the destination MAC is the end host MAC or a Layer-2 switch MAC rather than the next-hop router's interface MAC.
Layer function assignment errors: placing bit synchronization in Data Link layer instead of Physical layer.
Encryption boundary confusion: assuming network/transport headers (IP/Port) are encrypted when upper-layer (session/application) encryption is used.
Counting router layer visits incorrectly: forgetting that intermediate routers decapsulate incoming frames (L2 visit up) and encapsulate into new outgoing frames (L2 visit down), visiting L2 twice per router.
Overlooking pipelining in multi-packet delay: multiplying entire file transmission time by the number of hops instead of computing first packet traversal plus remaining packet pipeline times.

How questions are asked

Conceptual MCQs on layer function pairs (e.g., 'INCORRECT pair is')
Match the following lists (Layers to Functionalities, Protocols to Field Lengths)
Scenario-based Packet Sniffing / Firewall Inspection analysis
Addressing state queries (Identify Source/Destination IP and MAC at a specific link hop)
Numerical calculation of total multi-hop delay using store-and-forward pipelining
MSQs identifying true/false statements regarding frame/packet header modifications

Paper trends

Shift from basic recall (PDUs, protocol mappings) to multi-device packet traversal scenarios testing L2/L3 addressing (e.g., distinguishing next-hop router MAC from transparent switch and end destination IP).
2024, 2014, 2013, 2011
Introduction of MSQ format in recent editions (GATE 2024 Set 2) to test subtle misconceptions about L2 transparent switches versus L3 routers during packet transmission.
2024
Sustained inclusion of 1-mark matching table questions aligning layer duties and header field specifications.
2025, 2018

Difficulty notes

Easy: Direct recall of layer PDUs, matching standard layer roles, cryptographic primitives, or standard header sizes. Medium: Scenario questions tracing a packet across multiple hops (switches, routers) checking MAC/IP address modifications, header inspection capabilities of Layer-4 devices, or calculating pipelined store-and-forward transmission delays. Hard: Complex multi-hop topologies with heterogeneous link bandwidths/MTUs combined with layered encapsulation overhead.