Compiler Design · Data Flow Analyses
Official IIT answer key · IIT Roorkee · Audited Aug 2026
GATE CSE 2026 Set 1 Q42 · MCQ · 2 marks

Key concept
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Topic notes
Data flow analysis in GATE Compiler Design primarily evaluates an understanding of live variable analysis both conceptually and computationally on Control Flow Graphs (CFGs). Testing ranges from 1-mark recall questions on the compiler optimizations that rely on data-flow facts (like register allocation) to 2-mark CFG tracing questions tracking variable uses and definitions across program points.
Full Data Flow Analyses guide →Consider the control flow graph shown in the figure. Which one of the following options correctly lists the set of redundant expressions (common subexpressions) in the basic blocks B4 and B5? *Note:* All the variables are integers.
Topic-wise GATE CS PYQs with verified steps
Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.
