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Intermediate Code Generation

GATE CSE 2011 · Q36

MCQ2 marksMedium

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Consider evaluating the following expression tree on a machine with load-store architecture in which memory can be accessed only through load and store instructions. The variables aa, bb, cc, dd and ee are initially stored in memory. The binary operators used in this expression tree can be evaluated by the machine only when the operands are in registers. The instructions produce result only in a register. If no intermediate results can be stored in memory, what is the minimum number of registers needed to evaluate this expression?

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Official answer: D) 3

Intermediate Code Generation

We can determine the minimum number of registers required using the Ershov Numbers (Sethi-Ullman algorithm) for expression trees on a load-store architecture:

  1. Leaves (operands in memory): Loading any variable a,b,c,d,ea, b, c, d, e from memory into a register requires 11 register. Thus, Ershov number for each leaf is 11.

  2. Node (c+d)(c + d): Both children require 11 register. Since they are equal, the cost is:

    R(c+d)=1+1=2R(c + d) = 1 + 1 = 2
  3. Node (e−(c+d))(e - (c + d)):

    • Left child (ee) has weight 11.

    • Right child ((c+d)(c + d)) has weight 22.

    Evaluating the right child first requires 22 registers (result held in 11 register), and then evaluating the left child requires 11 register. Since the right child requires strictly more registers than the left, the cost is:

    R(e−(c+d))=max⁡(2,1+1)=2R(e - (c + d)) = \max(2, 1 + 1) = 2
  4. Node (a−b)(a - b): Both leaves require 11 register, so:

    R(a−b)=1+1=2R(a - b) = 1 + 1 = 2
  5. Root Node ((a−b)+(e−(c+d)))( (a - b) + (e - (c + d)) ): Both left and right subtrees require 22 registers. When both children have the same weight kk, the parent requires k+1k + 1 registers:

    R(root)=2+1=3R(\text{root}) = 2 + 1 = 3

Thus, a minimum of 3 registers are required.

Hence, the correct option is (D).

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This Intermediate Code Generation previous year question is Q36 of the GATE CSE 2011 paper. Find more GATE CSE PYQs on Intermediate Code Generation in Compiler Design, or browse all GATE CSE PYQs.

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Intermediate Code Generation in GATE CSE

Intermediate Code Generation has 14 GATE CSE PYQs across 12 papers from 2011 to 2025. 4 of them are 2-mark MCQs like this one, and it is the only one in GATE CSE 2011.

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GateAI solution cardGATE CSE 2011 · Q36 · MCQ

Consider evaluating the following expression tree on a machine with load-store architecture in which memory can be accessed only through load and store instructions. The variables a, b, c, d and e are initially stored in memory. The binary operators used in this expression tree can be evaluated by the machine only when the operands are in registers. The instructions produce result only in a register. If no intermediate results can be stored in memory, what is the minimum number of registers needed to evaluate this expression?

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.