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Digital Logic · Number Representation and Arithmetic
Official IIT answer key · IIT Roorkee · Audited Aug 2026
GATE CSE 2017 Set 1 Q9 · MCQ · 1 mark
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Topic notes
Number representation and arithmetic in GATE CS tests a student's precise understanding of positional number systems, fixed-point signed representations (2's complement, 1's complement, sign-magnitude), and IEEE 754 floating-point standards. Questions consistently balance direct conversions, range and boundary condition calculations, and arithmetic overflow detection across single and multi-register operations. Recent years exhibit a marked transition toward testing multi-register algebraic relationships and MSQ-based overflow condition checking.
Full Number Representation and Arithmetic guide →When two 8-bit numbers A7 A0 and B7 B0 in 2's complement representation (with A0 and B0 as the least significant bits) are added using a ripple-carry adder, the sum bits obtained are S7 S0 and the carry bits are C7 C0. An overflow is said to have occurred if
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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.