What are common examiner traps in Number Representation and Arithmetic?

Forgetting the implicit leading 1 in IEEE 754 normalized numbers when decoding mantissa (1.F)2. Forgetting to check the digit validity constraint (each digit must be strictly less than the base, di < base) when counting solutions to radix equations. Confusing the biased exponent E with the unbiased exponent e = E - 127. Assuming an exponent of all zeros is valid for normalized floating-point numbers instead of E = 1 (2-126). Incorrectly identifying overflow in 2's complement: subtracting a negative number is equivalent to adding a positive number and can overflow if the result exceeds 2n-1-1. Mixing up 2's complement range [-2n-1, 2n-1-1] with sign-magnitude range [-(2n-1-1), 2n-1-1], especially for edge cases like -2n-1. Discarding the constraint that base b must be strictly greater than any individual digit present in the expression (b > max(di)). Zero-extending signed negative numbers instead of sign-extending (e.g., prepending `1000...` or `0000...` instead of repeating the MSB `1`). Forgetting the implicit leading 1 in the IEEE 754 normalized significand when extracting mantissa bits. Incorrect bit shifting during exponent alignment before floating-point addition (shifting the wrong significand or shifting in the wrong direction). Mistaking an all-1s exponent (E = 255) as the largest numeric value instead of identifying it as a reserved code for NaN (when M ≠ 0) or Infinity (when M = 0). Forgetting the implicit leading 1 in normalized mantissa calculation, treating M directly as a standard integer or pure fraction without 1.M. Applying an incorrect bias (e.g., using 128 instead of 127 for 8-bit single-precision exponent bias). Sign-magnitude confusion: setting only the MSB to 1 while leaving the remaining bits as positive magnitude (e.g., 1000 0000 1110 0100). Failing to sign-extend leading ones across all high-order bits in a 16-bit negative representation. Stopping at 1's complement without adding 1.

GATE CSE Number Representation and Arithmetic PYQs

Medium yield27.5% of Digital Logic

Number representation and arithmetic in GATE CS tests a student's precise understanding of positional number systems, fixed-point signed representations (2's co… Read the guide

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Questions: 33
Asked: since 2012
Total marks: 39
Marks / paper: 1.5

33 GATE CSE Number Representation and Arithmetic PYQs with solutions, from Digital Logic. Browse all GATE CSE PYQs.

Questions

Every official paper that asked this topic, newest first.

What GATE tests in Number Representation and Arithmetic

Concepts, patterns, formulas and traps distilled from past papers.

Number representation and arithmetic in GATE CS tests a student's precise understanding of positional number systems, fixed-point signed representations (2's complement, 1's complement, sign-magnitude), and IEEE 754 floating-point standards. Questions consistently balance direct conversions, range and boundary condition calculations, and arithmetic overflow detection across single and multi-register operations. Recent years exhibit a marked transition toward testing multi-register algebraic relationships and MSQ-based overflow condition checking.

Core concepts

IEEE 754 single precision format: sign, biased exponent (bias 127), implicit leading bit, fractional mantissa
Special IEEE 754 cases: subnormal numbers (E=0, F≠ 0), zeros (E=0, F=0), infinities and NaNs (E=255)
Floating-point register operations: multiplication (eres = e1 + e2, mantissa multiplication) and addition/subtraction
2's complement representation, sign extension, and negation
Sign-magnitude representation and its dual representation of zero (X - Y = 1 distinct integers)
Arithmetic overflow conditions in 2's complement and sign-magnitude additions/subtractions
Ripple-carry adder latency: worst-case carry generation and carry propagation conditions
Fixed-point fractional representations and resolution (2-f step size)
Base/radix conversions (binary, octal, decimal, hexadecimal, arbitrary radix) and radix algebraic constraints
Positional radix representation and fractional base expansions
Base-to-base conversion techniques
2's complement signed integer representation and sign extension
IEEE 754 single-precision format (sign, 8-bit biased exponent with bias 127, 23-bit mantissa with implicit leading 1)
Floating-point addition, exponent alignment, and re-normalization
IEEE 754 Single-Precision (32-bit) Format Partitioning: 1 sign bit, 8 exponent bits, 23 mantissa bits
Exponent Biasing (E = exponent + 127 for single precision)
Implicit Leading Bit (Hidden bit 1.M for normalized numbers)
Special Encodings: Reserved exponent E = 255 with M ≠ 0 representing NaN, and E = 255 with M = 0 representing ±∞
2's complement representation
Sign extension to fixed bit-width (e.g., 16-bit)
Decimal to binary conversion of signed integers
1's complement bit inversion followed by adding 1

Recurring question patterns

IEEE 754 Single-Precision Encoding and Decoding
Commonmixed1 marks2026, 2021, 2017, 2014
Direct conversion between decimal values and 32-bit IEEE 754 representation (or its 8-digit hexadecimal notation), requiring decomposition into 1-bit sign, 8-bit biased exponent (bias 127), and 23-bit fractional mantissa with an implicit leading 1.
Floating-Point Register Arithmetic and Algebraic Verification
Commonmixed2 marks2025, 2023, 2022
Given two or three IEEE 754 single-precision numbers stored in hexadecimal registers, compute their product, sum, or evaluate which linear/algebraic equations among them hold true.
Signed Integer Arithmetic and Overflow Detection
Commonmixed1 marks2026, 2024, 2022, 2017
Given binary representations of numbers in 2's complement or sign-magnitude format with $n$ bits, determine which operations (addition/subtraction/multiplication) lead to overflow by comparing results against representable range $[-2^{n-1}, 2^{n-1}-1]$ or $[-(2^{n-1}-1), 2^{n-1}-1]$ .
Radix Equations and Unknown Base Solutions
CommonNAT1 marks2021, 2017, 2015, 2014
Solve for unknown digits or base variables $(x, y)$ in equations like $(a)_x = (b)_y$ or polynomial root equations $x^2 - c_1 x + c_2 = 0$ , enforcing the constraint that every digit $d$ must satisfy $0 \le d < \text{base}$ .
Range and Boundary Characteristics of Number Systems
CommonMCQ1 marks2021, 2019, 2017, 2016
Determining minimum/maximum representable values, total number of distinct representations (e.g. comparing 2's complement vs sign-magnitude due to dual zero), bit-width needed to avoid overflow, or smallest normalized floating-point numbers.
Adder Latency and Worst-Case Carry Propagation
RareNAT1 marks2016
Analyzing ripple-carry adder carry generation ( $G_i = A_i \cdot B_i$ ) and carry propagation ( $P_i = A_i \oplus B_i$ ) conditions to maximize the propagation delay path across $n$ bits.
Unknown Radix Equation Solving
OccasionalNAT1 marks2014
An algebraic equation containing numbers written in an unknown base $b$ is given; the candidate must set up a polynomial in $b$ and solve for the integer base satisfying $b > \max(\text{digits})$ .
Direct Base-to-Base Radix Conversion
OccasionalNAT1 marks2023
A number in base $b_1$ is given and must be converted to base $b_2$ , typically by routing through base 10 using polynomial evaluation followed by successive division.
2's Complement Sign Extension and Bit-Width Expansion
OccasionalMSQ1 marks2025
Given an $n$ -bit 2's complement integer, determine its valid representation in wider bit widths ( $2n$ , $4n$ ) by replicating the most significant bit (sign bit).
IEEE 754 Floating-Point Arithmetic and Encoding
OccasionalMCQ2 marks2026
Given two real numbers encoded in 32-bit single-precision IEEE 754 hexadecimal notation, decode the sign, biased exponent, and mantissa, align binary points, perform arithmetic (addition/subtraction), and re-encode to hex.
Identification of Extreme or Specific IEEE 754 Values
RareMCQ1 marks2024
Candidates are given bit patterns across the sign, exponent, and mantissa fields (or standard diagrammatic formats) and are asked to determine the largest, smallest, or special-case value (e.g., distinguishing the largest finite number from NaN or Infinity).
Signed Fixed-Width 2's Complement Representation
CommonMCQ1 marks2019
Given a negative decimal integer, find its exact binary bit-string representation in an $n$ -bit (e.g., 16-bit) 2's complement system.

Formulas GATE uses

IEEE 754 Normalized Single-Precision Value

V = (-1)^S \times (1.F)_2 \times 2^{E - 127}

Decoding a 32-bit IEEE 754 floating point number with sign bit $S$ , 8-bit biased exponent $E$ , and 23-bit fraction $F$ .

Smallest Normalized Positive IEEE 754 Number

V_{\min, \text{norm}} = 1.0_2 \times 2^{1 - 127} = 2^{-126}

Finding the boundary value for normalized numbers where $E = 1$ and $F = 0$ .

2's Complement Representable Range

[-2^{n-1}, 2^{n-1} - 1]

Determining the minimum and maximum representable signed integers with $n$ bits in 2's complement.

Sign-Magnitude Representable Range

[-(2^{n-1} - 1), 2^{n-1} - 1]

Determining the range of $n$ -bit sign-magnitude numbers with two representations for zero ( $+0, -0$ ).

2's Complement Arithmetic Overflow Boolean Condition

\text{Overflow} = A_{n-1} B_{n-1} \overline{S_{n-1}} + \overline{A_{n-1}} \overline{B_{n-1}} S_{n-1} = C_{\text{in}} \oplus C_{\text{out}}

Detecting overflow in $n$ -bit 2's complement addition of operands $A$ and $B$ resulting in sum $S$ .

Unsigned Fixed-Point Range

[0, 2^i - 2^{-f}]

Finding the decimal range of an $n$ -bit unsigned number with $i$ integer bits and $f$ fractional bits ( $n = i + f$ ).

Radix Polynomial Expansion

(d_k d_{k-1} \dots d_0 . d_{-1} \dots d_{-m})_b = \sum_{j=-m}^k d_j b^j

Converting arbitrary base- $b$ numbers to base 10 under the constraint $0 \le d_j < b$ .

Positional Number System Expansion

N_b = \sum_{i=-m}^{n-1} d_i b^i

Used when converting a number with integer and fractional digits from base $b$ to base 10 or when setting up algebraic equations with an unknown radix.

IEEE 754 Single-Precision Normal Value

V = (-1)^S \times (1.M)_2 \times 2^{E - 127}

Used when decoding 32-bit floating-point numbers into their real values and re-encoding significand and exponent results.

Sign Extension Rule

X_{k\text{-bit}} = \underbrace{s\ s\ \dots\ s}_{k-n\text{ times}} \ d_{n-2} \dots d_0

Used when expanding an $n$ -bit 2's complement representation with sign bit $s$ to a larger bit-width $k$ .

Normalized IEEE 754 Single-Precision Value

V = (-1)^S \times (1.M) \times 2^{E - 127}

Used to compute the real decimal value of a normalized 32-bit single-precision floating-point number where $1 \le E \le 254$ .

Maximum Finite Normalized Value

V_{\max} = (-1)^0 \times (2 - 2^{-23}) \times 2^{254 - 127} = (2 - 2^{-23}) \times 2^{127}

Used to identify the largest positive finite representable floating-point number under IEEE 754 single precision ( $E = 254, M = 11\dots 1_2$ ).

2's Complement Conversion

X_{2's} = (\overline{X}_{binary}) + 1 = 2^n - |X|

Used to represent a negative integer $-|X|$ in an $n$ -bit signed 2's complement format.

Examiner traps in Number Representation and Arithmetic

Forgetting the implicit leading 1 in IEEE 754 normalized numbers when decoding mantissa (1.F)2.
Forgetting to check the digit validity constraint (each digit must be strictly less than the base, di < base) when counting solutions to radix equations.
Confusing the biased exponent E with the unbiased exponent e = E - 127.
Assuming an exponent of all zeros is valid for normalized floating-point numbers instead of E = 1 (2-126).
Incorrectly identifying overflow in 2's complement: subtracting a negative number is equivalent to adding a positive number and can overflow if the result exceeds 2n-1-1.
Mixing up 2's complement range [-2n-1, 2n-1-1] with sign-magnitude range [-(2n-1-1), 2n-1-1], especially for edge cases like -2n-1.
Discarding the constraint that base b must be strictly greater than any individual digit present in the expression (b > max(di)).
Zero-extending signed negative numbers instead of sign-extending (e.g., prepending `1000...` or `0000...` instead of repeating the MSB `1`).
Forgetting the implicit leading 1 in the IEEE 754 normalized significand when extracting mantissa bits.
Incorrect bit shifting during exponent alignment before floating-point addition (shifting the wrong significand or shifting in the wrong direction).
Mistaking an all-1s exponent (E = 255) as the largest numeric value instead of identifying it as a reserved code for NaN (when M ≠ 0) or Infinity (when M = 0).
Forgetting the implicit leading 1 in normalized mantissa calculation, treating M directly as a standard integer or pure fraction without 1.M.
Applying an incorrect bias (e.g., using 128 instead of 127 for 8-bit single-precision exponent bias).
Sign-magnitude confusion: setting only the MSB to 1 while leaving the remaining bits as positive magnitude (e.g., 1000 0000 1110 0100).
Failing to sign-extend leading ones across all high-order bits in a 16-bit negative representation.
Stopping at 1's complement without adding 1.

How questions are asked

Convert hexadecimal IEEE 754 floating point string to decimal value (or vice versa)
Evaluate algebraic relations across multiple floating-point register variables (MCQ/MSQ)
Detect arithmetic overflow in n-bit 2's complement or sign-magnitude operations (MCQ/MSQ)
Count the number of valid (x, y) integer solutions for an inter-base equation (NAT)
Calculate difference in distinct values representable by two signed formats (NAT)
Find base b given quadratic roots or equivalences (NAT/MCQ)
Determine worst-case carry latency operand for an n-bit adder (NAT)
Solve for unknown radix from an algebraic fraction / equation
Convert representation from base b1 to base b2
Select valid multi-byte 2's complement representations under bit expansion
Compute sum/difference of IEEE 754 single-precision hex values and re-encode to hex
Given bit-field layouts in diagrams/options, identify the largest/smallest representable number
Identify special IEEE 754 values (NaN, +Infinity, -Infinity, Denormalized)
Convert negative decimal to n-bit 2's complement bit-string

Paper trends

Shift from basic 1-mark IEEE-754 format definitions to multi-register operations and algebraic relations among 2 or 3 hex-encoded variables.
2025, 2023, 2022, 2014, 2012
Adoption of MSQ format to test multiple arithmetic operations (sums, differences, negated additions) simultaneously for overflow.
2026, 2025, 2024
Consistent presence of integer base/radix constraint NAT questions requiring systematic enumeration of valid base/digit solutions.
2024, 2021, 2017, 2015, 2014
Earlier questions focused purely on positional number system basics and radix conversions in NAT format, while recent years have incorporated MSQ testing on signed representation nuances and 2-mark MCQs on multi-step IEEE 754 arithmetic.
2026, 2025, 2023, 2014
Direct visual/field representation testing of IEEE 754 standard single-precision formats appeared as a 1-mark foundational conceptual question.
2024
Direct, single-step conceptual conversion questions on signed binary representations are framed as 1-mark standard MCQs.
2019

Difficulty notes

Easy questions (1 mark) typically involve direct range formulas, single base conversions, decoding standard 2's complement strings, or checking overflow for simple 4-bit/5-bit pairs. Medium questions (1 or 2 marks) require multi-step algebraic operations on 2 to 3 IEEE-754 hexadecimal registers, worst-case adder propagation latency analysis, MSQ-style multi-operation overflow checks, or setting up Diophantine equations with strict radix bounds.