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GATE CSE Number Representation and Arithmetic PYQs

Standard yield1.1% of Computer Organization and Architecture

GATE tests Number Representation and Arithmetic by evaluating candidates' ability to decode hexadecimal representations of IEEE-754 floating-point numbers into… Read the guide

Questions
1
Asked
2020
Total marks
2
Marks / paper
0.1

1 GATE CSE Number Representation and Arithmetic PYQs with solutions, from Computer Organization and Architecture. Browse all GATE CSE PYQs.

What GATE tests in Number Representation and Arithmetic

Concepts, patterns, formulas and traps distilled from past papers.

GATE tests Number Representation and Arithmetic by evaluating candidates' ability to decode hexadecimal representations of IEEE-754 floating-point numbers into their true decimal values, perform arithmetic operations (such as division or multiplication), and re-encode the computed result back into the standard binary/hexadecimal format. Precision in field alignment (sign, biased exponent, and fractional mantissa) is central to solving these problems accurately.

Core concepts

  • IEEE-754 Single-Precision Format (1-bit Sign, 8-bit Exponent, 23-bit Mantissa)
  • Exponent Biasing (Bias = 127 for Single Precision)
  • Normalized Mantissa Representation (Implicit leading 1)
  • Hexadecimal to Binary and Binary to Hexadecimal Conversion
  • Floating-Point Division and Sign Handling

Recurring question patterns

  • IEEE-754 Arithmetic Operation and Re-encoding

    CommonMCQ2 marks2020

    Given two floating-point numbers in hexadecimal format representing IEEE-754 single-precision words, compute an arithmetic operation (e.g., division R1/R2R1/R2, addition, or multiplication) and determine the hexadecimal representation of the result register.

Formulas GATE uses

IEEE-754 Single-Precision Value Formula

Value=(−1)S×(1.M)×2E−127\text{Value} = (-1)^S \times (1.M) \times 2^{E - 127}

Used when decoding normalized 32-bit single-precision IEEE-754 floating-point bit patterns into real values, where SS is 1 bit, EE is 8 bits (bias 127), and MM is the 23-bit fractional mantissa.

Biased Exponent Calculation

E=Actual Exponent+127E = \text{Actual Exponent} + 127

Used during encoding when computing the 8-bit biased exponent field from the true power-of-two exponent.

Examiner traps in Number Representation and Arithmetic

  • Forgetting the implicit leading 1 in normalized IEEE-754 mantissa (treating mantissa 0.M instead of 1.M).
  • Miscalculating the bit boundaries when grouping 32 bits into 8-bit exponent and 23-bit mantissa across hex nibbles.
  • Incorrect sign handling in arithmetic operations, leading to selecting positive options instead of negative (e.g., confusing 0x40800000 with 0xC0800000).
  • Adding bias instead of subtracting it during decoding, or forgetting to re-bias the exponent when encoding the final result.

How questions are asked

  • Hexadecimal-encoded register arithmetic evaluation

Paper trends

  • Emphasis is placed on full end-to-end decoding, arithmetic computation, and re-encoding within IEEE-754 single-precision (32-bit) format rather than pure theory.

    2020

Difficulty notes

Medium difficulty arises from multi-step execution: candidates must accurately convert hex to binary, extract fields, decode decimal/binary values, perform division/multiplication, and correctly normalize and re-encode to hex without bit-alignment errors.