Consider a 3-bit counter, designed using T flip-flops, as shown below: Assuming the initial state of the counter given by PQR as 000, what are the next three states?
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GATE CSE 2021 Set 1 · Q28
Time

Select one answerSingle correct
Solution
Official answer: A) 011, 101, 000
Combinational and Sequential CircuitsFrom the circuit diagram, the inputs to the three T flip-flops are given by:
The next state of a T flip-flop is determined by the characteristic equation:
Given the initial state :
Clock Pulse 1:
Inputs: , ,
Next state:
State becomes .
Clock Pulse 2:
Inputs: , ,
Next state:
State becomes .
Clock Pulse 3:
Inputs: , ,
Next state:
State becomes .
Thus, the sequence of the next three states is 011, 101, 000, which corresponds to option (A).
Try the question first, then check your work.
Examiner trap
Identify the expressions for , , and from the feedback connections and update each state using .
This Combinational and Sequential Circuits previous year question is Q28 of the GATE CSE 2021 Set 1 paper. Find more GATE CSE PYQs on Combinational and Sequential Circuits in Digital Logic, or browse all GATE CSE PYQs.
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Combinational and Sequential Circuits has 32 GATE CSE PYQs across 22 papers from 2011 to 2026. 14 of them are 2-mark MCQs like this one, and it is the only one in GATE CSE 2021 Set 1.
How GATE tests Combinational and Sequential CircuitsIndependent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.