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Combinational and Sequential Circuits

GATE CSE 2023 · Q43

MCQ2 marksMedium

Time

Consider a sequential digital circuit consisting of T flip-flops and D flip-flops as shown in the figure. CLKIN is the clock input to the circuit. At the beginning, Q1, Q2 and Q3 have values 0, 1 and 1, respectively. Which one of the given values of (Q1, Q2, Q3) can NEVER be obtained with this digital circuit?

GATE CSE 2023 Q43 diagram

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Solution

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Official answer: A) (0, 0, 1)

Combinational and Sequential Circuits

From the given synchronous sequential circuit diagram, the inputs to the flip-flops are:

  • For the first T flip-flop (Q1Q_1): T1=Q3‾T_1 = \overline{Q_3}

  • For the D flip-flop (Q2Q_2): D2=Q1D_2 = Q_1

  • For the second T flip-flop (Q3Q_3): T3=Q2T_3 = Q_2

The characteristic equations for the next states are:

  • Q1+=Q1⊕T1=Q1⊕Q3‾Q_1^+ = Q_1 \oplus T_1 = Q_1 \oplus \overline{Q_3}

  • Q2+=D2=Q1Q_2^+ = D_2 = Q_1

  • Q3+=Q3⊕T3=Q3⊕Q2Q_3^+ = Q_3 \oplus T_3 = Q_3 \oplus Q_2

Starting from the initial state (Q1,Q2,Q3)=(0,1,1)(Q_1, Q_2, Q_3) = (0, 1, 1):

  1. Clock 1:

    • Q1+=0⊕1‾=0⊕0=0Q_1^+ = 0 \oplus \overline{1} = 0 \oplus 0 = 0

    • Q2+=0Q_2^+ = 0

    • Q3+=1⊕1=0Q_3^+ = 1 \oplus 1 = 0

    • Next state: (0,0,0)(0, 0, 0)

  2. Clock 2:

    • Q1+=0⊕0‾=0⊕1=1Q_1^+ = 0 \oplus \overline{0} = 0 \oplus 1 = 1

    • Q2+=0Q_2^+ = 0

    • Q3+=0⊕0=0Q_3^+ = 0 \oplus 0 = 0

    • Next state: (1,0,0)(1, 0, 0) *(Option B)*

  3. Clock 3:

    • Q1+=1⊕0‾=1⊕1=0Q_1^+ = 1 \oplus \overline{0} = 1 \oplus 1 = 0

    • Q2+=1Q_2^+ = 1

    • Q3+=0⊕0=0Q_3^+ = 0 \oplus 0 = 0

    • Next state: (0,1,0)(0, 1, 0)

  4. Clock 4:

    • Q1+=0⊕0‾=0⊕1=1Q_1^+ = 0 \oplus \overline{0} = 0 \oplus 1 = 1

    • Q2+=0Q_2^+ = 0

    • Q3+=0⊕1=1Q_3^+ = 0 \oplus 1 = 1

    • Next state: (1,0,1)(1, 0, 1) *(Option C)*

  5. Clock 5:

    • Q1+=1⊕1‾=1⊕0=1Q_1^+ = 1 \oplus \overline{1} = 1 \oplus 0 = 1

    • Q2+=1Q_2^+ = 1

    • Q3+=1⊕0=1Q_3^+ = 1 \oplus 0 = 1

    • Next state: (1,1,1)(1, 1, 1) *(Option D)*

  6. Clock 6:

    • Q1+=1⊕1‾=1⊕0=1Q_1^+ = 1 \oplus \overline{1} = 1 \oplus 0 = 1

    • Q2+=1Q_2^+ = 1

    • Q3+=1⊕1=0Q_3^+ = 1 \oplus 1 = 0

    • Next state: (1,1,0)(1, 1, 0)

  7. Clock 7:

    • Q1+=1⊕0‾=1⊕1=0Q_1^+ = 1 \oplus \overline{0} = 1 \oplus 1 = 0

    • Q2+=1Q_2^+ = 1

    • Q3+=0⊕1=1Q_3^+ = 0 \oplus 1 = 1

    • Next state: (0,1,1)(0, 1, 1) *(loops back to initial state)*

The cycle of states is:

(0,1,1)→(0,0,0)→(1,0,0)→(0,1,0)→(1,0,1)→(1,1,1)→(1,1,0)→(0,1,1)(0, 1, 1) \to (0, 0, 0) \to (1, 0, 0) \to (0, 1, 0) \to (1, 0, 1) \to (1, 1, 1) \to (1, 1, 0) \to (0, 1, 1)

The state (0,0,1)(0, 0, 1) is never reached in this state trajectory.

Therefore, the correct option is (A).

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This Combinational and Sequential Circuits previous year question is Q43 of the GATE CSE 2023 paper. Find more GATE CSE PYQs on Combinational and Sequential Circuits in Digital Logic, or browse all GATE CSE PYQs.

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GateAI solution cardGATE CSE 2023 · Q43 · MCQ

Consider a sequential digital circuit consisting of T flip-flops and D flip-flops as shown in the figure. CLKIN is the clock input to the circuit. At the beginning, Q1, Q2 and Q3 have values 0, 1 and 1, respectively. Which one of the given values of (Q1, Q2, Q3) can NEVER be obtained with this digital circuit?

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.