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Digital Logic · Combinational and Sequential Circuits
Official IIT answer key · IIT Bombay · Audited Aug 2026
GATE CSE 2021 Set 2 Q5 · MCQ · 1 mark
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Topic notes
GATE extensively tests combinational and sequential circuit design through both analytical tracing and formal synthesis. In combinational circuits, questions focus on multiplexer tree implementations, decoder-to-memory interfacing, and Boolean function realization using universal MUX/decoder blocks. In sequential logic, the focus is on synchronous counter state tracing, excitation equation derivation (for D, T, and JK flip-flops), non-standard sequence flip-flop counting, ripple counter frequency division, and FSM equivalence minimization.
Full Combinational and Sequential Circuits guide →Which one of the following circuits implements the Boolean function given below? f(x, y, z) = m0 + m1 + m3 + m4 + m5 + m6, where mi is the ith minterm.
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