Digital Logic · Boolean Algebra and Minimization
Official IIT answer key · IISc Bangalore · Audited Aug 2026
GATE CSE 2024 Set 1 Q28 · MSQ · 1 mark

Key concept
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Topic notes
Boolean algebra and minimization in GATE CS tests algebraic identities, canonical form transformations, K-map minimization (SOP/POS with and without don't-cares), functional completeness, and the structural properties of logic operators like XOR, XNOR, and majority functions. Early years primarily featured 1-mark or 2-mark MCQs focusing on single-step simplification or finding the minimal expression. Recent years (2021–2026) show a marked shift towards multi-select questions (MSQs) testing multiple valid minimal forms, set-theoretic minterm algebra across interconnected logic gates, and deep property verification of custom or majority Boolean functions.
Full Boolean Algebra and Minimization guide →Consider the circuit shown below where the gates may have propagation delays. Assume that all signal transitions occur instantaneously and that wires have no delays. Which of the following statements about the circuit is/are CORRECT?
Topic-wise GATE CS PYQs with verified steps
Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.
