The next state table of a 2-bit saturating up-counter is given below. The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1 and T0 are
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GATE CSE 2017 Set 2 · Q42
Time

Select one answerSingle correct
Solution
Official answer: B) T1 = Q1 Q0, T0 = Q1 + Q0
Combinational and Sequential CircuitsFor a T flip-flop, the excitation equation is given by:
Using the given state transition table:
From the table:
For , the only minterm with output is :
For , the minterms with output are , and it is at :
Therefore, the expressions are and , matching option (B).
Try the question first, then check your work.
Examiner trap
Use the characteristic equation of a T flip-flop, where , to determine the values of and for each state transition.
This Combinational and Sequential Circuits previous year question is Q42 of the GATE CSE 2017 Set 2 paper. Find more GATE CSE PYQs on Combinational and Sequential Circuits in Digital Logic, or browse all GATE CSE PYQs.
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Combinational and Sequential Circuits has 32 GATE CSE PYQs across 22 papers from 2011 to 2026. 14 of them are 2-mark MCQs like this one, and it is the only one in GATE CSE 2017 Set 2.
How GATE tests Combinational and Sequential CircuitsIndependent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.