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Digital Logic · Combinational and Sequential Circuits
Official IIT answer key · IIT Roorkee · Audited Aug 2026
GATE CSE 2017 Set 2 Q42 · MCQ · 2 marks
Key concept
Topic notes
GATE extensively tests combinational and sequential circuit design through both analytical tracing and formal synthesis. In combinational circuits, questions focus on multiplexer tree implementations, decoder-to-memory interfacing, and Boolean function realization using universal MUX/decoder blocks. In sequential logic, the focus is on synchronous counter state tracing, excitation equation derivation (for D, T, and JK flip-flops), non-standard sequence flip-flop counting, ripple counter frequency division, and FSM equivalence minimization.
Full Combinational and Sequential Circuits guide →Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.