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Combinational and Sequential Circuits

GATE CSE 2017 Set 2 · Q42

MCQ2 marksMedium

Time

The next state table of a 2-bit saturating up-counter is given below. The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1T_1 and T0T_0 are

GATE CSE 2017 Set 2 Q42 diagram

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Solution

Step-by-step verified solution

Official answer: B) T1 = Q1 Q0, T0 = Q1 + Q0

Combinational and Sequential Circuits

For a T flip-flop, the excitation equation is given by:

T=Q⊕Q+T = Q \oplus Q^+

Using the given state transition table:

Q1Q_1Q0Q_0Q1+Q_1^+Q0+Q_0^+T1=Q1⊕Q1+T_1 = Q_1 \oplus Q_1^+T0=Q0⊕Q0+T_0 = Q_0 \oplus Q_0^+
000000110⊕0=00 \oplus 0 = 00⊕1=10 \oplus 1 = 1
001111000⊕1=10 \oplus 1 = 11⊕0=11 \oplus 0 = 1
110011111⊕1=01 \oplus 1 = 00⊕1=10 \oplus 1 = 1
111111111⊕1=01 \oplus 1 = 01⊕1=01 \oplus 1 = 0

From the table:

  • For T1T_1, the only minterm with output 11 is (Q1,Q0)=(0,1)(Q_1, Q_0) = (0, 1):

T1=Q‾1Q0T_1 = \overline{Q}_1 Q_0
  • For T0T_0, the minterms with output 11 are (0,0),(0,1),(1,0)(0, 0), (0, 1), (1, 0), and it is 00 at (1,1)(1, 1):

T0=Q1Q0‾=Q‾1+Q‾0T_0 = \overline{Q_1 Q_0} = \overline{Q}_1 + \overline{Q}_0

Therefore, the expressions are T1=Q‾1Q0T_1 = \overline{Q}_1 Q_0 and T0=Q‾1+Q‾0T_0 = \overline{Q}_1 + \overline{Q}_0, matching option (B).

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This Combinational and Sequential Circuits previous year question is Q42 of the GATE CSE 2017 Set 2 paper. Find more GATE CSE PYQs on Combinational and Sequential Circuits in Digital Logic, or browse all GATE CSE PYQs.

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Combinational and Sequential Circuits in GATE CSE

Combinational and Sequential Circuits has 32 GATE CSE PYQs across 22 papers from 2011 to 2026. 14 of them are 2-mark MCQs like this one, and it is the only one in GATE CSE 2017 Set 2.

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GateAI solution cardGATE CSE 2017 Set 2 · Q42 · MCQ

The next state table of a 2-bit saturating up-counter is given below. The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1 and T0 are

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