The read access times and the hit ratios for different caches in a memory hierarchy are as given below. The read access time of main memory is 90 nanoseconds. Assume that the caches use the referred-word-first read policy and the write back policy. Assume that all the caches are direct mapped caches. Assume that the dirty bit is always 0 for all the blocks in the caches. In execution of a program, 60% of memory reads are for instruction fetch and 40% are for memory operand fetch. The average read access time in nanoseconds (up to 2 decimal places) is ________.

Given:

• I-cache: access time $T_{I} = 2\text{ ns}$, hit ratio $h_I = 0.8$

• D-cache: access time $T_{D} = 2\text{ ns}$, hit ratio $h_D = 0.9$

• L2-cache: access time $T_{L2} = 8\text{ ns}$, hit ratio $h_{L2} = 0.9$

• Main memory access time $T_{MM} = 90\text{ ns}$

### 1. Instruction Fetch (60% of reads) Uses hierarchical access through I-cache $\to$ L2-cache $\to$ Main Memory:

$$\begin{aligned} T_{\text{inst}} &= T_I + (1 - h_I) \times [T_{L2} + (1 - h_{L2}) \times T_{MM}] \\ &= 2 + (1 - 0.8) \times [8 + (1 - 0.9) \times 90] \\ &= 2 + 0.2 \times [8 + 9] \\ &= 2 + 0.2 \times 17 = 2 + 3.4 = 5.4\text{ ns} \end{aligned}$$

### 2. Data/Operand Fetch (40% of reads) Uses hierarchical access through D-cache $\to$ L2-cache $\to$ Main Memory:

$$\begin{aligned} T_{\text{data}} &= T_D + (1 - h_D) \times [T_{L2} + (1 - h_{L2}) \times T_{MM}] \\ &= 2 + (1 - 0.9) \times [8 + (1 - 0.9) \times 90] \\ &= 2 + 0.1 \times 17 = 2 + 1.7 = 3.7\text{ ns} \end{aligned}$$

### 3. Average Read Access Time

$$\begin{aligned} T_{\text{avg}} &= 0.60 \times T_{\text{inst}} + 0.40 \times T_{\text{data}} \\ &= 0.60 \times 5.4 + 0.40 \times 3.7 \\ &= 3.24 + 1.48 = 4.72\text{ ns} \end{aligned}$$