We want to design a synchronous counter that counts the sequence 0-1-0-2-0-3 and then repeats. The minimum number of J-K flip-flops required to implement this counter is …
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GATE CSE 2016 Set 1 · Q8
Time
Your answerNumerical answer
Solution
Official answer: 3 (±1) (±1)
Combinational and Sequential CircuitsThe required sequence is:
There are states in the repeating sequence cycle. Notice that the value appears three times, but is followed by different next values (, , and ). Therefore, to distinguish each occurrence of and form a deterministic finite state machine (counter), each step in the sequence of length must be assigned a unique state:
The minimum number of distinct states required is .
The minimum number of flip-flops needed to represent states is given by:
With flip-flops, we can have up to distinct states, which is sufficient to encode the states. *(Note: An implementation using 4 flip-flops was also accepted in the official key range of 3 to 4).*
Try the question first, then check your work.
Examiner trap
Count how many total steps are in one complete repetition cycle. How many flip-flops are required to uniquely distinguish each step?
This Combinational and Sequential Circuits previous year question is Q8 of the GATE CSE 2016 Set 1 paper. Find more GATE CSE PYQs on Combinational and Sequential Circuits in Digital Logic, or browse all GATE CSE PYQs.
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Combinational and Sequential Circuits has 32 GATE CSE PYQs across 22 papers from 2011 to 2026. 6 of them are 1-mark NAT questions like this one, and GATE CSE 2016 Set 1 has 2.
How GATE tests Combinational and Sequential CircuitsIndependent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.