A processor can support a maximum memory of 4 GB, where the memory is word-addressable (a word consists of two bytes). The size of the address bus of the processor is at least _________ bits.

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Official answer: 31 (±0)

Cache Memory and Hierarchy

Total Memory Size:
$\text{Total Memory} = 4\text{ GB} = 4 \times 2^{30}\text{ Bytes} = 2^{32}\text{ Bytes}$
Word Size:
$\text{Word Size} = 2\text{ Bytes} = 2^1\text{ Bytes}$
Number of Addressable Words:
$\text{Number of Words} = \frac{\text{Total Memory Size}}{\text{Word Size}} = \frac{2^{32}\text{ Bytes}}{2^1\text{ Bytes}} = 2^{31}\text{ words}$
Address Bus Size: Since the memory is word-addressable, each unique word must have a unique address.
$\text{Address Bus Width} = \log_2(2^{31}) = 31\text{ bits}$

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This Cache Memory and Hierarchy previous year question is Q9 of the GATE CSE 2016 Set 1 paper. Find more GATE CSE PYQs on Cache Memory and Hierarchy in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Cache Memory and Hierarchy in GATE CSE

Cache Memory and Hierarchy has 47 GATE CSE PYQs across 23 papers from 2011 to 2026. 7 of them are 1-mark NAT questions like this one, and it is the only one in GATE CSE 2016 Set 1.

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.