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Cache Memory and Hierarchy

GATE CSE 2014 Set 2 · Q9

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A 4-way set-associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The size of the physical address space is 4 GB. The number of bits for the TAG field is ________

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Official answer: 20

Cache Memory and Hierarchy
  1. Physical Address Space:

    Physical Address Space=4 GB=232 bytes\text{Physical Address Space} = 4\text{ GB} = 2^{32}\text{ bytes}
    Physical Address=32 bits\text{Physical Address} = 32\text{ bits}
  2. Block / Line Size:

    Word length=32 bits=4 bytes\text{Word length} = 32\text{ bits} = 4\text{ bytes}
    Block size=8 words=8×4 bytes=32 bytes=25 bytes\text{Block size} = 8\text{ words} = 8 \times 4\text{ bytes} = 32\text{ bytes} = 2^5\text{ bytes}
    Block offset=5 bits\text{Block offset} = 5\text{ bits}
  3. Number of Lines in Cache:

    Cache size=16 KB=16×1024 bytes=214 bytes\text{Cache size} = 16\text{ KB} = 16 \times 1024\text{ bytes} = 2^{14}\text{ bytes}
    Total lines=214 bytes25 bytes=29=512 lines\text{Total lines} = \frac{2^{14}\text{ bytes}}{2^5\text{ bytes}} = 2^9 = 512\text{ lines}
  4. Number of Sets in Cache:

    Associativity=4-way\text{Associativity} = 4\text{-way}
    Number of sets=5124=128=27 sets\text{Number of sets} = \frac{512}{4} = 128 = 2^7\text{ sets}
    Set index bits=7 bits\text{Set index bits} = 7\text{ bits}
  5. Tag Bits:

    Tag bits=Physical Address bits−(Set index bits+Block offset bits)\text{Tag bits} = \text{Physical Address bits} - (\text{Set index bits} + \text{Block offset bits})
    Tag bits=32−(7+5)=32−12=20 bits\text{Tag bits} = 32 - (7 + 5) = 32 - 12 = 20\text{ bits}

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This Cache Memory and Hierarchy previous year question is Q9 of the GATE CSE 2014 Set 2 paper. Find more GATE CSE PYQs on Cache Memory and Hierarchy in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Cache Memory and Hierarchy in GATE CSE

Cache Memory and Hierarchy has 47 GATE CSE PYQs across 23 papers from 2011 to 2026. 7 of them are 1-mark NAT questions like this one, and GATE CSE 2014 Set 2 has 4.

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GateAI solution cardGATE CSE 2014 Set 2 · Q9 · NAT

A 4-way set-associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The size of the physical address space is 4 GB. The number of bits for the TAG field is …

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