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Cache Memory and Hierarchy

GATE CSE 2014 Set 1 · Q44

MCQ2 marksMedium

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An access sequence of cache block addresses is of length NN and contains nn unique block addresses. The number of unique block addresses between two consecutive accesses to the same block address is bounded above by kk. What is the miss ratio if the access sequence is passed through a cache of associativity A≥kA \ge k exercising least-recently-used replacement policy?

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Official answer: A) n/N

Cache Memory and Hierarchy

Since the cache has associativity A≥kA \ge k and uses the LRU (Least Recently Used) replacement policy, a block will remain in its set as long as fewer than AA distinct blocks mapping to the same set are accessed between two successive references to it.

Between any two consecutive accesses to the same block address, at most kk unique block addresses are accessed across the entire sequence (and hence at most k≤Ak \le A in the same set). Therefore, after the very first reference (cold/compulsory miss) to each of the nn unique block addresses, that block will never be evicted before its next access. Every subsequent access to that block will result in a cache hit.

Thus:

  • Total number of misses = Number of compulsory misses = nn

  • Total number of accesses = NN

Miss Ratio=Total MissesTotal Accesses=nN\text{Miss Ratio} = \frac{\text{Total Misses}}{\text{Total Accesses}} = \frac{n}{N}

Hence, option (A) is correct.

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This Cache Memory and Hierarchy previous year question is Q44 of the GATE CSE 2014 Set 1 paper. Find more GATE CSE PYQs on Cache Memory and Hierarchy in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Cache Memory and Hierarchy in GATE CSE

Cache Memory and Hierarchy has 47 GATE CSE PYQs across 23 papers from 2011 to 2026. 16 of them are 2-mark MCQs like this one, and GATE CSE 2014 Set 1 has 2.

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GateAI solution cardGATE CSE 2014 Set 1 · Q44 · MCQ

An access sequence of cache block addresses is of length N and contains n unique block addresses. The number of unique block addresses between two consecutive accesses to the same block address is bounded above by k. What is the miss ratio if the access sequence is passed through a cache of associativity A ≥ k exercising least-recently-used replacement policy?

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.