Consider the 4-to-1 multiplexer with two select lines S1 and S0 given below. The minimal sum-of-products form of the Boolean expression for the output F of the multiplexer is
Topic-wise GATE CS PYQs with verified steps
GATE CSE 2014 Set 1 · Q45
Time

Select one answerSingle correct
Solution
Official answer: A) PQ + Q R + P QR
Combinational and Sequential CircuitsFrom the multiplexer diagram, the select lines are and , and the data inputs are:
The output of a 4-to-1 MUX is given by:
Substituting the inputs:
To find the minimal SOP form, we can simplify using Boolean algebra or a K-map: Expand into minterms:
Now contains the minterms in terms of :
Groupings:
Grouping and :
Grouping and :
The essential minterm () cannot combine with any adjacent 1s in the K-map, so it remains .
Thus, the minimal SOP expression is:
This matches option (A).
Try the question first, then check your work.
Examiner trap
Write the standard MUX equation and simplify using a 3-variable K-map for variables .
This Combinational and Sequential Circuits previous year question is Q45 of the GATE CSE 2014 Set 1 paper. Find more GATE CSE PYQs on Combinational and Sequential Circuits in Digital Logic, or browse all GATE CSE PYQs.
Free diagnostic
Take the 20-minute diagnostic: the 3 topics that cost you the most marks, and a rank range. Or sit 5 related Combinational and Sequential Circuits PYQs now with no account.
An official question by email at 7 AM IST, with a link to its verified solution. Unsubscribe in one click.
Combinational and Sequential Circuits has 32 GATE CSE PYQs across 22 papers from 2011 to 2026. 14 of them are 2-mark MCQs like this one, and it is the only one in GATE CSE 2014 Set 1.
How GATE tests Combinational and Sequential CircuitsIndependent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.