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Cache Memory and Hierarchy

GATE CSE 2025 Set 2 · Q39

MCQ2 marksMedium

Time

For a direct-mapped cache, 4 bits are used for the tag field and 12 bits are used to index into a cache block. The size of each cache block is one byte. Assume that there is no other information stored for each cache block.

Which ONE of the following is the CORRECT option for the sizes of the main memory and the cache memory in this system (byte addressable), respectively?

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Solution

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Official answer: A) 64 KB and 4 KB

Cache Memory and Hierarchy

To determine the sizes of the main memory and the cache memory:

  1. Main Memory Address Breakdown:

    • Tag bits = 44

    • Index bits = 1212

    • Block offset bits: Since the cache block size is 1 byte1\text{ byte} and the system is byte-addressable, the offset bits =log⁡2(1)=0 bits= \log_2(1) = 0\text{ bits}.

    Total physical address bits:

    Address bits=Tag+Index+Offset=4+12+0=16 bits\text{Address bits} = \text{Tag} + \text{Index} + \text{Offset} = 4 + 12 + 0 = 16\text{ bits}
  2. Main Memory Size:

    Main Memory Size=216 bytes=64 KB\text{Main Memory Size} = 2^{16}\text{ bytes} = 64\text{ KB}
  3. Cache Memory Size:

    Number of cache lines=2Index bits=212=4096=4 K\text{Number of cache lines} = 2^{\text{Index bits}} = 2^{12} = 4096 = 4\text{ K}
    Cache Data Size=(Number of lines)×(Block size)=4096×1 byte=4 KB\text{Cache Data Size} = (\text{Number of lines}) \times (\text{Block size}) = 4096 \times 1\text{ byte} = 4\text{ KB}

Therefore, the sizes of the main memory and the cache memory are 64 KB and 4 KB, respectively, which corresponds to option (A).

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This Cache Memory and Hierarchy previous year question is Q39 of the GATE CSE 2025 Set 2 paper. Find more GATE CSE PYQs on Cache Memory and Hierarchy in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Cache Memory and Hierarchy in GATE CSE

Cache Memory and Hierarchy has 47 GATE CSE PYQs across 23 papers from 2011 to 2026. 16 of them are 2-mark MCQs like this one, and GATE CSE 2025 Set 2 has 3.

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GateAI solution cardGATE CSE 2025 Set 2 · Q39 · MCQ

For a direct-mapped cache, 4 bits are used for the tag field and 12 bits are used to index into a cache block. The size of each cache block is one byte. Assume that there is no other information stored for each cache block. Which ONE of the following is the CORRECT option for the sizes of the main memory and the cache memory in this system (byte addressable), respectively?

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.