GateAI
Instruction Set and Addressing Modes

GATE CSE 2015 Set 1 · Q8

MCQ1 markEasy

Time

For computers based on three-address instruction formats, each address field can be used to specify which of the following: (S1) A memory operand (S2) A processor register (S3) An implied accumulator register

Select one answerSingle correct

Pick an option to check

Solution

Step-by-step verified solution

Official answer: A) Either S1 or S2

Instruction Set and Addressing Modes

In a three-address instruction format, an instruction explicitly specifies three operands (typically two source operands and one destination operand):

OpcodeAddress1,  Address2,  Address3\text{Opcode}\quad \text{Address}_1,\; \text{Address}_2,\; \text{Address}_3

Each address field can specify:

  1. A memory operand (address in memory), or

  2. A processor register.

An implied accumulator register is used in zero-address or one-address instruction formats (where the accumulator is implicitly understood by the opcode and not specified in an explicit address field).

Therefore, each address field can specify either S1 (a memory operand) or S2 (a processor register).

Hence, (A) is the correct option.

Try the question first, then check your work.

Think the official key or this write-up is wrong?

Report error or challenge

Examiner trap

The misconception this question tests

This Instruction Set and Addressing Modes previous year question is Q8 of the GATE CSE 2015 Set 1 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

Free diagnostic

Where do you stand for GATE?

Take the 20-minute diagnostic: the 3 topics that cost you the most marks, and a rank range. Or sit 5 related Instruction Set and Addressing Modes PYQs now with no account.

One GATE CSE PYQ every morning

An official question by email at 7 AM IST, with a link to its verified solution. Unsubscribe in one click.

Instruction Set and Addressing Modes in GATE CSE

Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 6 of them are 1-mark MCQs like this one, and it is the only one in GATE CSE 2015 Set 1.

How GATE tests Instruction Set and Addressing Modes

More from GATE CSE 2015 Set 1

Share this solution

A plain-text card for WhatsApp or Telegram study groups.

GateAI solution cardGATE CSE 2015 Set 1 · Q8 · MCQ

For computers based on three-address instruction formats, each address field can be used to specify which of the following: (S1) A memory operand (S2) A processor register (S3) An implied accumulator register

Topic-wise GATE CS PYQs with verified steps

Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.