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Instruction Set and Addressing Modes

GATE CSE 2017 Set 1 · Q49

NAT2 marksMedium

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Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and unconditional branch instructions use PC-relative addressing mode with Offset specified in bytes to the target location of the branch instruction. Further the Offset is always with respect to the address of the next instruction in the program sequence. Consider the following instruction sequence If the target of the branch instruction is ii, then the decimal value of the Offset is _________.

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Official answer: -16 (±0)

Instruction Set and Addressing Modes

Given:

  • Each instruction is 4 bytes long.

  • The branch instruction beq is at instruction number i+3i+3.

  • In PC-relative addressing, the base address is the address of the next instruction in sequence, which is instruction number i+4i+4.

  • The target instruction is instruction number ii.

Let the byte address of instruction ii be Ai=4iA_i = 4i.

  • Address of next instruction after branch =Ai+4=4(i+4)=4i+16= A_{i+4} = 4(i+4) = 4i + 16.

  • Address of target instruction =Ai=4i= A_i = 4i.

The Offset is calculated as:

Offset=Target Address−Address of next instruction\text{Offset} = \text{Target Address} - \text{Address of next instruction}
Offset=4i−(4i+16)=−16\text{Offset} = 4i - (4i + 16) = -16

Thus, the decimal value of the Offset is -16.

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This Instruction Set and Addressing Modes previous year question is Q49 of the GATE CSE 2017 Set 1 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Instruction Set and Addressing Modes in GATE CSE

Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 6 of them are 2-mark NAT questions like this one, and GATE CSE 2017 Set 1 has 2.

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GateAI solution cardGATE CSE 2017 Set 1 · Q49 · NAT

Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and unconditional branch instructions use PC-relative addressing mode with Offset specified in bytes to the target location of the branch instruction. Further the Offset is always with respect to the address of the next instruction in the program sequence. Consider the following instruction sequence If the target of the branch instruction is i, then the decimal value of the Offset is …

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