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Instruction Set and Addressing Modes

GATE CSE 2016 Set 2 · Q10

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A processor has 40 distinct instructions and 24 general purpose registers. A 32-bit instruction word has an opcode, two register operands and an immediate operand. The number of bits available for the immediate operand field is __________.

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Official answer: 16

Instruction Set and Addressing Modes

Let us calculate the bits required for each field of the 32-bit instruction:

  1. Opcode field: To support 40 distinct instructions:

    Opcode bits=⌈log⁡240⌉=6 bits(25=32<40≤26=64)\text{Opcode bits} = \lceil \log_2 40 \rceil = 6\text{ bits} \quad (2^5 = 32 < 40 \le 2^6 = 64)
  2. Register operand fields: To address 24 general purpose registers:

    Bits per register=⌈log⁡224⌉=5 bits(24=16<24≤25=32)\text{Bits per register} = \lceil \log_2 24 \rceil = 5\text{ bits} \quad (2^4 = 16 < 24 \le 2^5 = 32)

    Since there are two register operands, they require:

    2×5=10 bits2 \times 5 = 10\text{ bits}
  3. Immediate operand field:

    Total instruction length=32 bits\text{Total instruction length} = 32\text{ bits}
    Bits for immediate operand=32−(Opcode bits+2×Register bits)\text{Bits for immediate operand} = 32 - (\text{Opcode bits} + 2 \times \text{Register bits})
    Bits for immediate operand=32−(6+10)=32−16=16 bits\text{Bits for immediate operand} = 32 - (6 + 10) = 32 - 16 = 16\text{ bits}

Thus, the number of bits available for the immediate operand field is 16.

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This Instruction Set and Addressing Modes previous year question is Q10 of the GATE CSE 2016 Set 2 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Instruction Set and Addressing Modes in GATE CSE

Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 2 of them are 1-mark NAT questions like this one, and GATE CSE 2016 Set 2 has 2.

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GateAI solution cardGATE CSE 2016 Set 2 · Q10 · NAT

A processor has 40 distinct instructions and 24 general purpose registers. A 32-bit instruction word has an opcode, two register operands and an immediate operand. The number of bits available for the immediate operand field is …

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