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Instruction Set and Addressing Modes

GATE CSE 2018 · Q5

MCQ1 markEasy

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Consider the following processor design characteristics. I. Register-to-register arithmetic operations only II. Fixed-length instruction format III. Hardwired control unit Which of the characteristics above are used in the design of a RISC processor?

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Official answer: D) I, II and III

Instruction Set and Addressing Modes

Key characteristics of a Reduced Instruction Set Computer (RISC) architecture include:

  1. Load/Store architecture: Arithmetic and logical operations are performed only on data stored in registers (register-to-register operations). Only specific load and store instructions access memory (Characteristic I).

  2. Fixed-length instructions: Instructions typically have a standard fixed size (e.g., 32 bits), which simplifies instruction decoding and pipelining (Characteristic II).

  3. Hardwired control unit: RISC uses simple instructions executed in a single cycle, which are most efficiently implemented using a fast hardwired control unit rather than microprogrammed control (Characteristic III).

Since all three characteristics (I, II, and III) are core design principles of RISC processors, D is the correct option.

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This Instruction Set and Addressing Modes previous year question is Q5 of the GATE CSE 2018 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Instruction Set and Addressing Modes in GATE CSE

Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 6 of them are 1-mark MCQs like this one, and it is the only one in GATE CSE 2018.

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GateAI solution cardGATE CSE 2018 · Q5 · MCQ

Consider the following processor design characteristics. I. Register-to-register arithmetic operations only II. Fixed-length instruction format III. Hardwired control unit Which of the characteristics above are used in the design of a RISC processor?

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