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Instruction Set and Addressing Modes

GATE CSE 2021 Set 1 · Q55

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Consider the following instruction sequence where registers R1, R2 and R3 are general purpose and MEMORY[X] denotes the content at the memory location X. Assume that the content of the memory location 5000 is 10, and the content of the register R3 is 3000. The content of each of the memory locations from 3000 to 3010 is 50. The instruction sequence starts from the memory location 1000. All the numbers are in decimal format. Assume that the memory is byte addressable. After the execution of the program, the content of memory location 3010 is ___________.

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Official answer: 50

Instruction Set and Addressing Modes

Let's determine the memory addresses occupied by each instruction starting at address 1000:

  • Address 1000 (size 4): MOV R1, (5000)→R1=MEMORY[5000]=10\rightarrow \text{R1} = \text{MEMORY}[5000] = 10

  • Address 1004 (size 4): MOV R2, (R3)→R2=MEMORY[R3]\rightarrow \text{R2} = \text{MEMORY}[\text{R3}]

  • Address 1008 (size 2): ADD R2, R1→R2=R1+R2\rightarrow \text{R2} = \text{R1} + \text{R2}

  • Address 1010 (size 4): MOV (R3), R2→MEMORY[R3]=R2\rightarrow \text{MEMORY}[\text{R3}] = \text{R2}

  • Address 1014 (size 2): INC R3→R3=R3+1\rightarrow \text{R3} = \text{R3} + 1

  • Address 1016 (size 2): DEC R1→R1=R1−1\rightarrow \text{R1} = \text{R1} - 1

  • Address 1018 (size 2): BNZ 1004 →\rightarrow branches back to address 1004 if R1≠0\text{R1} \neq 0

  • Address 1020 (size 1): HALT

Tracing the loop iterations:

  • Initially, R1=10\text{R1} = 10, R3=3000\text{R3} = 3000.

  • Iteration 1: MEMORY[3000]\text{MEMORY}[3000] is updated to 50+10=6050 + 10 = 60; R3\text{R3} becomes 30013001, R1\text{R1} becomes 99.

  • Iteration 2: MEMORY[3001]\text{MEMORY}[3001] is updated to 50+9=5950 + 9 = 59; R3\text{R3} becomes 30023002, R1\text{R1} becomes 88.

  • ...

  • Iteration 10: MEMORY[3009]\text{MEMORY}[3009] is updated to 50+1=5150 + 1 = 51; R3\text{R3} becomes 30103010, R1\text{R1} becomes 00.

When R1=0\text{R1} = 0, the condition BNZ 1004 evaluates to false and the loop terminates. The instruction at memory location 3010 is never updated by the loop, so its content remains unmodified at 50.

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This Instruction Set and Addressing Modes previous year question is Q55 of the GATE CSE 2021 Set 1 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 6 of them are 2-mark NAT questions like this one, and it is the only one in GATE CSE 2021 Set 1.

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GateAI solution cardGATE CSE 2021 Set 1 · Q55 · NAT

Consider the following instruction sequence where registers R1, R2 and R3 are general purpose and MEMORY[X] denotes the content at the memory location X. Assume that the content of the memory location 5000 is 10, and the content of the register R3 is 3000. The content of each of the memory locations from 3000 to 3010 is 50. The instruction sequence starts from the memory location 1000. All the numbers are in decimal format. Assume that the memory is byte addressable. After the execution of the program, the content of memory location 3010 is …

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.