Consider the following data path diagram. Consider an instruction: $\text{R0} \leftarrow \text{R1} + \text{R2}$. The following steps are used to execute it over the given data path. Assume that PC is incremented appropriately. The subscripts r and w indicate read and write operations, respectively. 1. $\text{R2}_\text{r}, \text{TEMP1}_\text{r}, \text{ALU}_\text{add}, \text{TEMP2}_\text{w}$ 2. $\text{R1}_\text{r}, \text{TEMP1}_\text{w}$ 3. $\text{PC}_\text{r}, \text{MAR}_\text{w}, \text{MEM}_\text{r}$ 4. $\text{TEMP2}_\text{r}, \text{R0}_\text{w}$ 5. $\text{MDR}_\text{r}, \text{IR}_\text{w}$ Which one of the following is the correct order of execution of the above steps?

To execute the instruction $\text{R0} \leftarrow \text{R1} + \text{R2}$, the micro-operations follow the standard instruction cycle:

1. Instruction Fetch (Steps 3 & 5):

   • Send the program counter value to the memory address register and initiate a memory read: $\text{PC}_\text{r}, \text{MAR}_\text{w}, \text{MEM}_\text{r}$ (Step 3).

   • Load the fetched instruction word from the memory data register into the instruction register: $\text{MDR}_\text{r}, \text{IR}_\text{w}$ (Step 5).

2. Operand Fetch & ALU Operation (Steps 2 & 1):

   • The ALU has two inputs: one comes from the temporary register TEMP1 and the other from the common bus. First, move the contents of $\text{R1}$ to TEMP1: $\text{R1}_\text{r}, \text{TEMP1}_\text{w}$ (Step 2).

   • Place $\text{R2}$ on the bus, feed TEMP1 to the ALU, perform the addition, and write the output into TEMP2: $\text{R2}_\text{r}, \text{TEMP1}_\text{r}, \text{ALU}_\text{add}, \text{TEMP2}_\text{w}$ (Step 1).

3. Write Back (Step 4):

   • Transfer the result from TEMP2 to register $\text{R0}$: $\text{TEMP2}_\text{r}, \text{R0}_\text{w}$ (Step 4).

Thus, the correct sequence is 3, 5, 2, 1, 4, corresponding to option (C).