An 8KB direct-mapped write-back cache is organized as multiple blocks, each of size 32-bytes. The processor generates 32-bit addresses. The cache controller maintains the tag information for each cache block comprising of the following. 1 Valid bit 1 Modified bit As many bits as the minimum needed to identify the memory block mapped in the cache. What is the total size of memory needed at the cache controller to store meta-data (tags) for the cache?

1. Determine the number of blocks (lines) in the cache:

   $$\text{Cache Size} = 8\text{ KB} = 2^{13}\text{ bytes}$$

   $$\text{Block Size} = 32\text{ bytes} = 2^5\text{ bytes}$$

   $$\text{Number of lines} = \frac{2^{13}\text{ bytes}}{2^5\text{ bytes}} = 2^8 = 256\text{ lines}$$

2. Break down the 32-bit physical address:

   • Word/Block offset bits $= \log_2(32) = 5\text{ bits}$

   • Line/Index bits $= \log_2(256) = 8\text{ bits}$

   • Tag bits $= 32 - 8 - 5 = 19\text{ bits}$

3. Metadata per cache line:

   • Tag bits $= 19\text{ bits}$

   • Valid bit $= 1\text{ bit}$

   • Modified (dirty) bit $= 1\text{ bit}$

   • Total metadata per block $= 19 + 1 + 1 = 21\text{ bits}$

4. Total metadata size for the entire cache:

   $$\text{Total size} = 256\text{ blocks} \times 21\text{ bits/block} = 5376\text{ bits}$$

Thus, the total memory required is 5376 bits, corresponding to option (D).