A computer has a 256 KByte, 4-way set associative, write back data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit. The number of bits in the tag field of an address is

Given parameters:

• Cache Size $= 256\text{ KB} = 2^{18}\text{ Bytes}$

• Block Size $= 32\text{ Bytes} = 2^5\text{ Bytes}$

• Set Associativity ($P$) $= 4 = 2^2$

• Physical Address $= 32\text{ bits}$

1. Block offset bits:

   $$\text{Block offset} = \log_2(32) = 5\text{ bits}$$

2. Total number of cache blocks (lines):

   $$\text{Total lines} = \frac{256\text{ KB}}{32\text{ B}} = \frac{2^{18}}{2^5} = 2^{13} = 8192\text{ lines}$$

3. Number of sets:

   $$\text{Number of sets} = \frac{\text{Total lines}}{4} = \frac{2^{13}}{2^2} = 2^{11} = 2048\text{ sets}$$

4. Set index bits:

   $$\text{Set index} = \log_2(2048) = 11\text{ bits}$$

5. Tag bits:

   $$\text{Tag bits} = 32 - (\text{Set index} + \text{Block offset}) = 32 - (11 + 5) = 16\text{ bits}$$

Thus, the number of bits in the tag field is 16 (Option C).