Let WB and WT be two set associative cache organizations that use LRU algorithm for cache block replacement. WB is a write back cache and WT is a write through cache. Which of the following statements is/are FALSE?

We are asked to identify which statements are FALSE:

• (A) FALSE: In a write-through (WT) cache, writes are immediately propagated to main memory, so cache blocks in WT are always consistent with memory and do not require a dirty (modified) bit. A dirty bit is only needed in a write-back (WB) cache.

• (B) FALSE: In a write-back (WB) cache, a write hit modifies only the cache block and sets the dirty bit. It does not initiate a transfer to main memory at the time of the hit; writing to main memory is deferred until eviction.

• (C) TRUE: In WT cache, since main memory is already kept up-to-date on every write, evicting a block simply invalidates/replaces it without any data transfer to main memory.

• (D) FALSE: When a read miss occurs in a WB cache, a new block must be brought from main memory into a set. If all blocks in the target set are valid and the block selected by LRU replacement happens to be dirty, that dirty block must be written back (evicted) to main memory. Thus, a read miss *can* lead to the eviction of a dirty block.

Hence, the FALSE statements are A, B, and D.