A given program has 25% load/store instructions. Suppose the ideal CPI (cycles per instruction) without any memory stalls is 2. The program exhibits 2% miss rate on instruction cache and 8% miss rate on data cache. The miss penalty is 100 cycles. The speedup ($\textit{rounded off to two decimal places}$) achieved with a perfect cache (i.e., with NO data or instruction cache misses) is ______

To calculate the actual CPI with stalls:

1. Instruction Cache Stalls:

   • Every instruction requires an instruction fetch (1 access per instruction).

   • Instruction miss rate $= 2\% = 0.02$

   • Miss penalty $= 100\text{ cycles}$

   $$\text{I-cache stall cycles per instruction} = 1 \times 0.02 \times 100 = 2\text{ cycles}$$

2. Data Cache Stalls:

   • Load/store instructions make up $25\% = 0.25$ of all instructions (0.25 data accesses per instruction).

   • Data miss rate $= 8\% = 0.08$

   • Miss penalty $= 100\text{ cycles}$

   $$\text{D-cache stall cycles per instruction} = 0.25 \times 0.08 \times 100 = 2\text{ cycles}$$

3. Total Actual CPI:

   $$\text{CPI}_{\text{actual}} = \text{CPI}_{\text{ideal}} + \text{I-cache stalls} + \text{D-cache stalls} = 2 + 2 + 2 = 6$$

4. CPI with Perfect Cache:

   $$\text{CPI}_{\text{perfect}} = \text{CPI}_{\text{ideal}} = 2$$

5. Speedup:

   $$\text{Speedup} = \frac{\text{CPI}_{\text{actual}}}{\text{CPI}_{\text{perfect}}} = \frac{6}{2} = 3.00$$

Thus, the speedup achieved with a perfect cache is 3.00.