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I/O Interface, Interrupts and DMA

GATE CSE 2024 Set 1 · Q15

MCQ1 markEasy

Time

Which one of the following statements is FALSE?

Select one answerSingle correct

Pick an option to check

Solution

Step-by-step verified solution

Official answer: C) Programmed I/O mechanism has a better CPU utilization than the interrupt driven I/O mechanism

I/O Interface, Interrupts and DMA

To identify the false statement, let us evaluate each option:

  • Option A: In cycle stealing mode of DMA, the DMA controller takes control of the system bus for one bus cycle at a time to transfer a single data word (or byte) and then releases the bus back to the CPU. This statement is TRUE.

  • Option B: In burst mode (block transfer mode), an entire block of data is transferred in one continuous sequence without repeatedly releasing and re-requesting the system bus. Hence, for bulk data transfer, burst mode has less arbitration overhead and achieves a higher throughput than cycle stealing mode. This statement is TRUE.

  • Option C: In Programmed I/O, the CPU remains in a busy-waiting (polling) loop to check the status of the I/O device until it is ready for data transfer, which severely degrades CPU utilization. In contrast, Interrupt-driven I/O frees the CPU to perform other computational tasks until the I/O device is ready and signals an interrupt, yielding much better CPU utilization. Therefore, stating that programmed I/O has better CPU utilization is FALSE.

  • Option D: In vectored interrupts, the interrupting device provides the interrupt vector (address or index to the vector table) directly to the CPU on the data bus, allowing the CPU to immediately branch to the corresponding Interrupt Service Routine (ISR). In non-vectored interrupts, the CPU must jump to a fixed general service routine and poll devices to find the source. Thus, ISR execution starts faster with vectored interrupts. This statement is TRUE.

Hence, statement (C) is the false statement.

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This I/O Interface, Interrupts and DMA previous year question is Q15 of the GATE CSE 2024 Set 1 paper. Find more GATE CSE PYQs on I/O Interface, Interrupts and DMA in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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I/O Interface, Interrupts and DMA in GATE CSE

I/O Interface, Interrupts and DMA has 13 GATE CSE PYQs across 12 papers from 2011 to 2026. 8 of them are 1-mark MCQs like this one, and it is the only one in GATE CSE 2024 Set 1.

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Which one of the following statements is FALSE?

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Independent practice explanation verified by the GateAI team. GATE is conducted by the IITs; question text follows the official paper.