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Instruction Set and Addressing Modes

GATE CSE 2024 Set 2 · Q57

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A processor with 16 general purpose registers uses a 32-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand fields, and a 16-bit scalar field. If 8 addressing modes are to be supported, the maximum number of unique opcodes possible for every addressing mode is ________

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Official answer: 32 (±0)

Instruction Set and Addressing Modes

Let us determine the bit allocation for the 32-bit instruction format:

  1. Scalar field:16 bits16\text{ bits}

  2. Register operand fields: There are 2 register fields. Since there are 16 general-purpose registers, each register field requires:

    log⁡2(16)=4 bits\log_2(16) = 4\text{ bits}

    For two register fields: 2×4=8 bits2 \times 4 = 8\text{ bits}.

  3. Addressing mode field: To support 8 addressing modes:

    log⁡2(8)=3 bits\log_2(8) = 3\text{ bits}
  4. Opcode field:

    Opcode bits=32−(16+8+3)=32−27=5 bits\text{Opcode bits} = 32 - (16 + 8 + 3) = 32 - 27 = 5\text{ bits}

With 5 bits allocated to the opcode, the maximum number of unique opcodes possible is:

25=322^5 = 32

Thus, the maximum number of unique opcodes possible for every addressing mode is 32.

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This Instruction Set and Addressing Modes previous year question is Q57 of the GATE CSE 2024 Set 2 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Instruction Set and Addressing Modes in GATE CSE

Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 6 of them are 2-mark NAT questions like this one, and GATE CSE 2024 Set 2 has 2.

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GateAI solution cardGATE CSE 2024 Set 2 · Q57 · NAT

A processor with 16 general purpose registers uses a 32-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand fields, and a 16-bit scalar field. If 8 addressing modes are to be supported, the maximum number of unique opcodes possible for every addressing mode is …

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