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Instruction Set and Addressing Modes

GATE CSE 2026 Set 1 · Q15

MCQ1 markEasy

Time

Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand. Which one of the following sequences of instructions corresponds to the high-level language statement Z=X+YZ = X + Y ? *Note:* X, Y, and Z are memory operands. R0, R1, and R2 are registers.

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Solution

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Official answer: D) LOAD R0, X LOAD R1, Y ADD R2, R0, R1 STORE Z, R2

Instruction Set and Addressing Modes

In a load-store architecture (typical of RISC systems):

  1. ALU operations (such as ADD) can only operate on operands stored in registers, not directly on memory locations.

  2. Access to memory is strictly restricted to LOAD and STORE instructions.

  3. The first operand is the destination operand.

To compute the high-level statement Z=X+YZ = X + Y where X,Y,ZX, Y, Z reside in memory:

  • Load XX into a register: LOAD R0, X

  • Load YY into a register: LOAD R1, Y

  • Perform the addition using registers: ADD R2, R0, R1 (storing the sum in R2\text{R2})

  • Store the result back into memory location ZZ: STORE Z, R2

Therefore, option (D) correctly represents the required sequence.

  • Options (A), (B), and (C) are invalid because they attempt to use memory operands directly in the ADD arithmetic instruction, which violates the principles of a load-store architecture.

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This Instruction Set and Addressing Modes previous year question is Q15 of the GATE CSE 2026 Set 1 paper. Find more GATE CSE PYQs on Instruction Set and Addressing Modes in Computer Organization and Architecture, or browse all GATE CSE PYQs.

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Instruction Set and Addressing Modes in GATE CSE

Instruction Set and Addressing Modes has 19 GATE CSE PYQs across 15 papers from 2011 to 2026. 6 of them are 1-mark MCQs like this one, and GATE CSE 2026 Set 1 has 2.

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GateAI solution cardGATE CSE 2026 Set 1 · Q15 · MCQ

Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand. Which one of the following sequences of instructions corresponds to the high-level language statement Z = X + Y ? *Note:* X, Y, and Z are memory operands. R0, R1, and R2 are registers.

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